BYUNGHYUN JANG   I completed my PhD degree (Advisor: Prof. David Kaeli) and joined the   Shader (Graphics) Compiler Group at AMD. Education   PhD in Computer Engineering, Northeastern University, 2010   MS in Computer Science, Oklahoma State University, 2002   BS in Bio-Mechatronic Engineering, Sungkyunkwan University, South Korea 2000 Research Areas   · GPU Computing (GPGPU): Programming Model, Hardware Architecture, and Program Optimizations   · Compiler Techniques for Data-Parallel Architectures   · Program Parallelization for Data-Parallel Architectures   · High Performance Computing (Hardware Architectures and Programming Models)   · General Topics on Computer Architecture and Compiler Work Experience   · AMD, Shader (Graphics) Compiler Group, Boxborough MA U.S.A.      Member of Technical Staff Engineer, Sep. 2010~present   · AMD, Shader (Graphics) Compiler Group, Marlborough MA U.S.A.      Graduate Research Intern, Jan.~Jun. 2008   · SAMSUNG Electronics, Digital Media R&D Center, South Korea      Senior Software Engineer, 2003~2005   · SAMSUNG Electronics, Digital Media R&D Center, South Korea      Graduate Research Intern, Jun.~Jul. 2002   · Korean Army, Mandatory Military Service, South Korea, 1995~1997 Awards   · AMD/ATI Fellowship Award, 2008~2009   · Best Poster Award, NSF RICC, 2008 and 2009 in a row   · World First Digital Multimedia Broadcasting (DMB) Solution Development Award, SAMSUNG Electronics, 2004   · Engineer of the Month Award, SAMSUNG Electronics, 2004   · Academic Merit-Based Scholarship, Sungkyunkwan University, 1998~1999 Publications (Conference and Journal) [15] An Algorithmic GPGPU Memory Optimization, Parallel Computing (ParCo) Special Issue, 2010 (submitted) [14] Static Memory Access Pattern Analysis on a Massively Parallel GPU, Symposium on Application Accelerators in High Performance Computing (SAAHPC'10), Knoxville, TN USA, 2010 [13] Accelerating the Local Outlier Factor Algorithm on a GPU for Intrusion Detection Systems, 3rd Workshop on GPGPU (GPGPU3), Pittsburgh, PA USA, 2010 [12] Data Structures and Transformations for Physically Based Simulation on a GPU, 9th International Meeting on High Performance Computing for Computational Science (VECPAR'10), Berkeley, CA USA, 2010 [11] Exploiting Memory Access Patterns to Improve Memory Performance in Data Parallel Architectures, IEEE Transactions on Parallel and Distributed Systems (TPDS), 2010 [10] Data Transformation Enabling Loop Vectorization on Multithreaded Data Parallel Architectures, 15th ACM SIGPLAN Symposium on Principles and Practices of Parallel Programming (PPoPP'10), Bangalore, India, 2010 [9] Profile-Guided Optimization of Critical Medical Imaging Algorithms, IEEE International Symposium on Biomedical Imaging (ISBI'09), Boston MA, Jun. 2009 [8] Multi GPU Implementation of Iterative Tomographic Reconstruction Algorithms, IEEE International Symposium on Biomedical Imaging (ISBI'09), Boston MA, Jun. 2009 [7] Architecture-Aware Optimization Targeting Multithreaded Stream Computing, 2nd Workshop on General Purpose Computation on GPU (GPGPU2), Washington DC, Mar. 2009   - Past Research - [6] Monomer Control for Error Tolerance in DNA Self-Assembly, Journal of Electronic Testing: Theory and Application (JETTA), 2007 [5] Modeling and Evaluation of Multi-Bank SRAM Design for Leakage Power Reduction, Proceedings of the 4th Boston Area Computer Architecture Workshop (BARC'07), 2007 [4] Error Rate Reduction in DNA Self-Assembly by Non-Constant Monomer Concentrations and Profiling, Design Automation and Test in Europe (DATE'07), 2007 [3] Error Tolerance of DNA Self-Assembly by Monomer Concentration Control, IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'06), Washington DC, Oct. 2006 [2] Spare Line Borrowing Technique for Distributed Memory Cores in SoC, Special Session, IEEE Instrument and Measurement Technology Conference (IMTC'05), Ottawa, Canada, May. 2005 [1] Modeling and Evaluation of the Interconnection-driven Repairability for Distributed Embedded Memory Cores on System-on-Chip, International Conference on Modeling, Identification, and Control (MIC'03), IASTED, Innsbruck, Austria, Feb. 2003 Professional and Invited Talks   · Iterative CT Image Reconstruction and Code Optimizations on a GPU, Analogic Corp., Peabody MA, May. 2010   · GPU Computing, SAMSUNG Electronics, South Korea, Apr. 2010   · GPU Computing, ETRI, South Korea, Apr. 2010   · CUDA and OpenCL tutorial, Workshop on GPU Computing for Biomedical Research,     Harvard Medical School, Oct. 2009   · Exploiting Memory Access Patterns to Improve Memory Performance in Data Parallel     Architectures, AMD/ATI, Boxborough MA, Oct. 2009   · CUDA Tutorial, CRA-W/CDC Careers in High Performance Systems (CHiPS) Mentoring     Workshop, UIUC, Jul. 2009 Internal Talks   · Static Memory Access Pattern Analysis Enabling Algorithmic Memory Optimizations on GPUs,     Northeastern University GPU Research Group, Apr. 2010   · Evaluation and Enhancement of Memory Efficiency Targeting General-Purpose Computations     on Scalable Data-Parallel GPU Architectures, Ph.D Dessertation Proposal, Northeastern University,     Dec. 2009   · AMD Stream Computing, Northeastern University Computer Architecture Group (NUCAR), 2009   · Shader, Northeastern University Computer Architecture Group (NUCAR), 2009   · Instruction Scheduling for Minmal Register Usage in Multithreaded VLIW GPU, Shader Compiler     Group, AMD/ATI, 2008   · Hardware Performance Counter and Toss Point in SIMD GPU Machine, Shader Compiler Group,     AMD/ATI, 2008   · Register Allocation and Performance in SIMD GPU Machine, Shader Compiler Group, AMD/ATI,     2008   · CUDA Programming, Northeastern University Computer Architecture Group (NUCAR), 2007   · Binary Translation, Northeastern University Computer Architecture Group (NUCAR), 2007   · Decompilation, Northeastern University Computer Architecture Group (NUCAR), 2007   · Linker and Loader, Northeastern University Computer Architecture Group (NUCAR), 2007 * Detailed resume and references are available upon requests via email at * Redesigned on 5/18/2009, Updated on 12/14/2010